NXP Semiconductors /LPC5410x /VFIFO /FIFOCFGSPI0

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Interpret as FIFOCFGSPI0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RXSIZE0TXSIZE0RESERVED

Description

FIFO configuration register for SPI0

Fields

RXSIZE

Configures the SPI receive FIFO size. A zero values provides no System FIFO service for the related SPI receiver.

TXSIZE

Configures the SPI transmit FIFO size. A zero values provides no System FIFO service for the related SPI transmitter.

RESERVED

Reserved. Read value is undefined, only zero should be written.

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